Infer single element local ram to register.

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Authored
lannylian
Committed
lannylianApr 9 2015, 10:25 PM
Parents
rLEGUPc6867540acb8: Add back pressure testing in FIR testbench.
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Description

Infer single element local ram to register.

A local RAM/ROM with only one element can be inferred as a register, with load
latency reduced to 0.

This feature can be turned off by adding this to config.tcl,

set_parameter INFER_SINGLE_ELEMENT_LOCAL_RAM_TO_REGISTER 0

rLEGUPc94d7dcfefd9

examples/legup.tcl

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llvm/lib/Target/Verilog/Allocation.cpp

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llvm/lib/Target/Verilog/Allocation.h

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llvm/lib/Target/Verilog/GenerateRTL.cpp

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llvm/lib/Target/Verilog/GenerateRTL.h

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llvm/lib/Target/Verilog/LegupConfig.cpp

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llvm/lib/Target/Verilog/Ram.cpp

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llvm/lib/Target/Verilog/Ram.h

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llvm/lib/Target/Verilog/VerilogWriter.cpp

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